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搞了半天了，用標(biāo)準(zhǔn)庫最高配置66M，hal庫都配最高只能配置到64M，難道和STM32F103一樣？
標(biāo)準(zhǔn)庫配置如下：
static void SetSysClock(void)
{
__IO uint32_t HSIStartUpStatus = 0;
// 把RCC外設(shè)初始化成復(fù)位狀態(tài)
RCC_DeInit();
//使能HSI, HSI=16M
RCC_HSICmd(ENABLE);
// 等待 HSI 就緒
HSIStartUpStatus = RCC->CR & RCC_CR_HSIRDY;
// 只有 HSI就緒之后則繼續(xù)往下執(zhí)行
if (HSIStartUpStatus == RCC_CR_HSIRDY) {
// 如果要超頻就得在這里下手啦
// 設(shè)置PLL來源時(shí)鐘，設(shè)置VCO分頻因子m，設(shè)置VCO倍頻因子n，
// 設(shè)置系統(tǒng)時(shí)鐘分頻因子p，設(shè)置OTG FS,SDIO,RNG分頻因子q
RCC_PLLConfig(RCC_PLLSource_HSI, 16, 264, 4, 7);
// 使能PLL
RCC_PLLCmd(ENABLE);
// 等待 PLL穩(wěn)定
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {}
/*-----------------------------------------------------*/
//開啟 OVER-RIDE模式，以能達(dá)到更高頻率
// PWR->CR |=PWR_CR_VOS;
// while ((PWR->CSR & PWR_CSR_ODRDY) == 0) { }
// PWR->CR |= PWR_CR_ODSWEN;
// while ((PWR->CSR & PWR_CSR_ODSWRDY) == 0) {}
// 配置FLASH預(yù)取指,指令緩存,數(shù)據(jù)緩存和等待狀態(tài)
FLASH->ACR = FLASH_ACR_PRFTEN
| FLASH_ACR_ICEN
|FLASH_ACR_DCEN
|FLASH_ACR_LATENCY_3WS;
/*-----------------------------------------------------*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// 讀取時(shí)鐘切換狀態(tài)位，確保PLLCLK被選為系統(tǒng)時(shí)鐘
while (RCC_GetSYSCLKSource() != 0x08) {}
// 調(diào)壓器電壓輸出級別配置為1，以便在器件為最大頻率
// 工作時(shí)使性能和功耗實(shí)現(xiàn)平衡
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
// HCLK = SYSCLK / 1
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK2 = HCLK / 2
RCC_PCLK2Config(RCC_HCLK_Div2);
// PCLK1 = HCLK / 4
RCC_PCLK1Config(RCC_HCLK_Div4);
} else {
// HSI啟動(dòng)出錯(cuò)處理
while (1) {}
}
}
hal庫配置如下：
void SystemClock_Config(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
/* Enable Power Control clock */
__HAL_RCC_PWR_CLK_ENABLE();
/* The voltage scaling allows optimizing the power consumption when the device is
clocked below the maximum system frequency, to update the voltage scaling value
regarding system frequency refer to product datasheet. */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
/* Enable HSI Oscillator and activate PLL with HSI as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = 0x10;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 16;
RCC_OscInitStruct.PLL.PLLN = 384;
RCC_OscInitStruct.PLL.PLLP = 6;
RCC_OscInitStruct.PLL.PLLQ = 7;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
while(1)
{
}
}
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
clocks dividers */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
{
while(1)
{
}
}
}
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